This application is related to a co-pending application that bears Motorola Ser. No. 09/144,686, entitled "MAGNETIC RANDOM ACCESS MEMORY AND FABRICATING METHOD THEREOF," filed on Aug. 31, 1998, and incorporated herein by reference.
A magnetic memory element has a structure that includes ferromagnetic layers separated by a non-magnetic layer. Information is stored as directions of magnetization vectors in magnetic layers. Magnetic vectors in one magnetic layer, for instance, are magnetically fixed or pinned, while the magnetization direction of the other magnetic layer is free to switch between the same and opposite directions as information that are called "Parallel" and "Antiparallel" states, respectively. In response to Parallel and Antiparallel states, the magnetic memory element represents two different resistances. The resistance has minimum and maximum values when the magnetization vectors of the two magnetic layers point in substantially the same and opposite directions, respectively. Accordingly, a detection of changes in resistance allows an MRAM device to provide information stored in the magnetic memory element.
An MRAM device integrates magnetic memory elements and other circuits, for example, a control circuit for magnetic memory elements, comparators for detecting states in a magnetic memory element, input/output circuits, etc. These circuits are fabricated in the process of CMOS technology in order to lower the power consumption of the MRAM device. The CMOS process requires high temperature steps that exceed 300.degree. C. for depositing dielectric and metal layers and annealing implants, for example.
Magnetic layers employ ferromagnetic material such as CoFe and NiFeCo that requires processing below 300.degree. C. in order to prevent intermixing of magnetic materials caused by high temperatures. Accordingly, magnetic memory elements need to be fabricated at a different stage after CMOS processing.
Magnetic memory elements contain components that are easily oxidized and also sensitive to corrosion. To protect magnetic memory elements from degradation and keep the performance and reliability of the MRAM device, a passivation layer is formed over magnetic memory elements.
In addition, a magnetic memory element includes very thin layers, some of them are tens of angstroms thick. The performance of the magnetic memory element is sensitive to the surface conditions on which magnetic layers are deposited. Accordingly, it is necessary to make a flat surface to prevent the characteristics of an MRAM device from degrading.
Metal lines are employed to produce magnetic fields for writing and/or reading states in a magnetic memory element. Less amount of current is desired to minimize power consumption.
Accordingly, it is a purpose of the present invention to provide an improved MRAM device that prevents a magnetic memory element from thermal degradation while fabricating the device.
It is another purpose of the present invention to provide an improved MRAM device that prevents a magnetic memory element from oxidation and corrosion.
It is a further purpose of the present invention to provide an improved MRAM device that reduces power consumption of the device.
It is a still further purpose of the present invention to provide a method of integrating an improved MRAM device into a CMOS process.